Tag:risc-v
All the articles with the tag "risc-v".
Machines build machines - AI creates a bootable VM
Posted on:May 17, 2025 at 10:00 AMSee how AI is pushing the boundaries of computer engineering. I'm sharing my journey driving AI to build a functional RISC-V 32-bit VM simulation, reaching the milestone of booting OpenSBI. Discover the process behind this AI-assisted journey and what's next on the path to a fully bootable Linux kernel and potentially an FPGA implementation.
Bare metal JavaScript on RISC-V
Posted on:May 14, 2025 at 10:00 PMExplore how to run JavaScript directly on bare metal, like microcontrollers. This post shows you how to get JavaScript code executing on embedded hardware without an operating system, opening up new ways to program these chips. The example is done on a RISC-V VM.
Bare metal printf - C standard library without OS
Posted on:April 26, 2025 at 12:00 PMGuide to implementing a C standard library for bare metal hardware using Newlib, enabling powerful functions like printf and malloc without relying on an operating system. This step-by-step guide demonstrates how to configure and integrate Newlib on RISC-V architecture, showing you how to redirect standard I/O through UART for embedded systems development.
RISC-V interrupts with a timer example
Posted on:October 9, 2023 at 02:20 PMA detailed example of RISC-V interrupts in C through OpenSBI timer infrastructure.
Bare Metal Rust on RISC-V With Dynamic Memory
Posted on:October 4, 2023 at 07:30 PMA bare metal example of Rust programming on RISC-V. Includes a proof of concept for dynamic memory allocation.
789 KB Linux Without MMU on RISC-V
Posted on:October 4, 2023 at 10:00 AMA guide on building a tiny Linux (only 789 KB) that requires no MMU and deploying it on a RISC-V system, with custom userspace code.
Making a micro Linux distro
Posted on:September 21, 2023 at 07:30 PMA guide on building a simple Linux distribution from scratch. Detailed guide on building the kernel and the init process. Finally, a little distribution is built with u-root that is capable of connecting to the Internet.
RISC-V SBI and the full boot process
Posted on:September 9, 2023 at 09:00 PMDetailed explanation on how RISC-V boot process works and what role SBI has in the RISC-V software stack. Concrete example with OpenSBI.
Bare metal programming with RISC-V guide
Posted on:September 9, 2023 at 12:05 PMGuide on coding a bare metal program with UART output for RISC-V and running the emulation with QEMU. Brief overview of the RISC-V boot process.